Photolithography is a basic process used in manufacturing integrated circuits. In summary, photolithography involves forming a layer of light or radiation-sensitive material, such as photoresist, above a layer of material or a substrate. The radiation-sensitive material is selectively exposed to a light generated by a light source (such as a deep ultraviolet or extreme ultraviolet source) to transfer a pattern defined by a mask to the radiation-sensitive material. The exposed layer of radiation-sensitive material is developed to define a patterned mask layer. Various process operations, such as etching or ion implantation processes, may then be performed on the underlying layer of material or substrate through the patterned mask layer.
An objective of integrated circuit fabrication is to faithfully reproduce the original circuit design on the integrated circuit product. Historically, the feature sizes and pitches employed in integrated circuit products were such that a desired pattern could be formed using a single patterned photoresist masking layer. However, in recent years, device dimensions and pitches have been reduced to the point where existing photolithography tools, e.g., 193 nm wavelength immersion photolithography tools, cannot form a single patterned mask layer with all of the features of the overall target pattern. Accordingly, designers have resorted to techniques that involve performing multiple exposures to define a single target pattern in a layer of material. One such technique is generally referred to as multiple patterning, e.g., double patterning. In general, double patterning is an exposure method that involves splitting (i.e., dividing or separating) a dense overall target circuit pattern into two separate, less-dense patterns. The simplified, less-dense patterns are then printed separately on a wafer utilizing two separate masks (where one of the masks is utilized to image one of the less-dense patterns, and the other mask is utilized to image the other less-dense pattern). This technique effectively lowers the complexity of the photolithography process, improving the achievable resolution and enabling the printing of far smaller features that would otherwise be impossible using existing photolithography tools. Litho-etch-litho-etch (LELE) is one such multiple patterning technique. As illustrated in FIG. 1A, the pattern cannot be formed with a single mask, but rather is broken into two patterns 101 and 103. Each pattern is assigned a different color, where design rules are satisfied within each color. However, LELE requires careful alignment between the two masks.
A SADP process has been developed to overcome the alignment issues. For SADP, a pattern of mandrels is formed on a substrate, a spacer material is deposited on side surfaces of the mandrels, and the mandrels are removed. A block mask may be used to isolate portions not to be etched. The resulting pattern formed by the spacers has twice as many elements as the mandrel pattern. Therefore, SADP is an attractive solution for manufacturing next-generation devices, particularly metal routing lines on such next-generation devices, due to better overlay control that is possible when using an SADP process. Metal lines that are defined by mandrel patterns are often called mandrel metals while other metal lines are called non-mandrel metals. Mandrel metals and non-mandrel metals are often referred by two color metal lines. In SADP technology, two color metal lines are always separated by either spacer material or block mask so that they cannot overlap. In another word, metal stitching is not possible in conventional SADP technology.
In placement and route technology, a metal stub route that connects metal lines of two abutting cells is an efficient technique to improve the metal routing efficiency and chip scaling, as well as circuit performance. In double patterning technology, such as LELE for 20 nm design, or triple patterning, such as LELELE for 10 nm design, shown by patterns 107, 109, and 111 in FIG. 1C, a metal stub route requires a stitch to resolve color conflict between adjacent lines. However, 7 nm designs require SADP technology, but a metal stub route is not an option for SADP technology because stitching is not permitted in a SADP process.
A need therefore exists for SADP methodology enabling the formation of a metal stub route between adjacent metal lines.